The present invention generally relates to fabrication of semiconductor devices and more particularly to the technology of alignment of exposure apparatus.
With increasing speed and functional diversity of semiconductor devices, extremely miniaturized patterns are formed nowadays on the surface of semiconductor wafers. Associated with this, there exists an increasing demand for more accurate alignment in the photolithographic process, particularly in the exposure step of semiconductor wafers conducted by using an exposure apparatus.
In the fabrication process of semiconductor devices, it has been practiced to achieve alignment of semiconductor patterns with regard to an underlying semiconductor pattern at the time of exposure process by measuring the coordinate of alignment marks formed in each of the chip regions arranged in rows and columns on a semiconductor wafer.